The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a capacitor in semiconductor device.
The width (i.e., critical dimension (CD)) of a capacitor gets narrow due to the high integration of a semiconductor device. In other words, the size of an opening for a bottom electrode of a semiconductor device decreases.
FIGS. 1A and 1B are transmission electron microscopy (TEM) images showing a conventional capacitor in a semiconductor device. A sacrificial layer between the openings becomes thin because of a bowing profile in approximate mid regions of the openings. Referring FIG. 1B, a bottom critical dimension CD of the openings gets narrower compared to the width (i.e., CD) of each of the openings.
As the size of the openings decreases, the openings increasingly have a bowing profile due to the interference of a plasma for etching. As a result, capacitors, which are subsequently formed, are likely to be bridged together. Also, a lack of an etching margin causes the bottom CDs of the openings to decrease, and this decrease leads to the reduction in capacitor Cs of capacitors. However, in the case of etching a target layer/structure less to prevent the bowing profile formed by the interference of the plasma, the bottom CDs of the openings may increasingly decrease. On the other hand, in the case of etching the target layer/structure more to secure the bottom CDs of the openings, the bowing profile may become severe. Therefore, a method to overcome these two limitations needs to be developed.